VLSI ARRAYS WITH LIMITED I/O BANDWIDTH FOR PATTERN ANALYSIS.

Philip S. Liu, Tzay Y. Young

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationIEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma
Place of PublicationNew York, NY, USA
PublisherIEEE
Pages2-9
Number of pages8
ISBN (Print)0818604980
StatePublished - Dec 1 1983

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Bandwidth

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Liu, P. S., & Young, T. Y. (1983). VLSI ARRAYS WITH LIMITED I/O BANDWIDTH FOR PATTERN ANALYSIS. In IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma (pp. 2-9). New York, NY, USA: IEEE.

VLSI ARRAYS WITH LIMITED I/O BANDWIDTH FOR PATTERN ANALYSIS. / Liu, Philip S.; Young, Tzay Y.

IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. New York, NY, USA : IEEE, 1983. p. 2-9.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Liu, PS & Young, TY 1983, VLSI ARRAYS WITH LIMITED I/O BANDWIDTH FOR PATTERN ANALYSIS. in IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. IEEE, New York, NY, USA, pp. 2-9.
Liu PS, Young TY. VLSI ARRAYS WITH LIMITED I/O BANDWIDTH FOR PATTERN ANALYSIS. In IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. New York, NY, USA: IEEE. 1983. p. 2-9
Liu, Philip S. ; Young, Tzay Y. / VLSI ARRAYS WITH LIMITED I/O BANDWIDTH FOR PATTERN ANALYSIS. IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. New York, NY, USA : IEEE, 1983. pp. 2-9
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