System architecture for multi-technology testbench-on-a-chip

Angela Hodge, Robert Newcomb, Mona Zaghloul, Onur Tigli

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

The Architecture for a multi-technology testbench on a chip is presented for functional testing of mixed signal devices. The technologies tested by this System-on-a-Chip (SoC) include Op Amps, biosensors, and smart signal processing of Analog/Digital Multiplexers. This paper focuses on describing the architecture of the testbench on a chip as well as the results obtained from testing integral components of the fabricated device. The objective of this research is to uncover key metrology infrastructure issues needed for developing the design reuse approach for multi-technology System-on-a-Chip (SoC) devices.

Original languageEnglish (US)
Pages (from-to)736-739
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume2
DOIs
StatePublished - Jan 1 2002
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'System architecture for multi-technology testbench-on-a-chip'. Together they form a unique fingerprint.

  • Cite this