The Architecture for a multi-technology testbench on a chip is presented for functional testing of mixed signal devices. The technologies tested by this System-on-a-Chip (SoC) include Op Amps, biosensors, and smart signal processing of Analog/Digital Multiplexers. This paper focuses on describing the architecture of the testbench on a chip as well as the results obtained from testing integral components of the fabricated device. The objective of this research is to uncover key metrology infrastructure issues needed for developing the design reuse approach for multi-technology System-on-a-Chip (SoC) devices.
|Original language||English (US)|
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - Jan 1 2002|
ASJC Scopus subject areas
- Electrical and Electronic Engineering