System architecture for multi-technology testbench-on-a-chip

Angela Hodge, Robert Newcomb, Mona Zaghloul, Onur Tigli

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The Architecture for a multi-technology testbench on a chip is presented for functional testing of mixed signal devices. The technologies tested by this System-on-a-Chip (SoC) include Op Amps, biosensors, and smart signal processing of Analog/Digital Multiplexers. This paper focuses on describing the architecture of the testbench on a chip as well as the results obtained from testing integral components of the fabricated device. The objective of this research is to uncover key metrology infrastructure issues needed for developing the design reuse approach for multi-technology System-on-a-Chip (SoC) devices.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Volume2
StatePublished - 2002
Externally publishedYes
Event2002 IEEE International Symposium on Circuits and Systems - Phoenix, AZ, United States
Duration: May 26 2002May 29 2002

Other

Other2002 IEEE International Symposium on Circuits and Systems
CountryUnited States
CityPhoenix, AZ
Period5/26/025/29/02

Fingerprint

Operational amplifiers
Testing
Biosensors
Signal processing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Hodge, A., Newcomb, R., Zaghloul, M., & Tigli, O. (2002). System architecture for multi-technology testbench-on-a-chip. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 2)

System architecture for multi-technology testbench-on-a-chip. / Hodge, Angela; Newcomb, Robert; Zaghloul, Mona; Tigli, Onur.

Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 2 2002.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hodge, A, Newcomb, R, Zaghloul, M & Tigli, O 2002, System architecture for multi-technology testbench-on-a-chip. in Proceedings - IEEE International Symposium on Circuits and Systems. vol. 2, 2002 IEEE International Symposium on Circuits and Systems, Phoenix, AZ, United States, 5/26/02.
Hodge A, Newcomb R, Zaghloul M, Tigli O. System architecture for multi-technology testbench-on-a-chip. In Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 2. 2002
Hodge, Angela ; Newcomb, Robert ; Zaghloul, Mona ; Tigli, Onur. / System architecture for multi-technology testbench-on-a-chip. Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 2 2002.
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