Abstract
This paper addresses the effects of synchronization errors in two interconnected discrete time systems represented in state space with small clock frequency mismatches. An event based discrete time index is used to capture the dynamics of the arising system. In a second step, stability of the overall system is analyzed and compared to stability of both, the perfectly synchronized system (with identical clock signals) and the synchronized system with a non-zero phase difference between the two clock signals.
| Original language | English (US) |
|---|---|
| Pages (from-to) | IV568-IV571 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 4 |
| State | Published - Jul 14 2003 |
| Event | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand Duration: May 25 2003 → May 28 2003 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering