PIPELINED DATA BROADCASTING IN VLSI ARRAY DESIGN.

Philip S. Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Feasibility of data broadcasting within a VLSI computing array depends on a number of factors such as interprocessor I/O bandwidth, hardware complexity, array throughput, vertical integration and external I/O bandwidth. The design and analysis of a systolic matrix multiplier is used to relate these factors.

Original languageEnglish (US)
Title of host publicationConference Proceedings - Annual Phoenix Conference
PublisherIEEE
Pages115-120
Number of pages6
ISBN (Print)0818606142
StatePublished - Dec 1 1985

Publication series

NameConference Proceedings - Annual Phoenix Conference

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Liu, P. S. (1985). PIPELINED DATA BROADCASTING IN VLSI ARRAY DESIGN. In Conference Proceedings - Annual Phoenix Conference (pp. 115-120). (Conference Proceedings - Annual Phoenix Conference). IEEE.