OPTIMAL AND BROADCASTING PROCESSOR ARRAYS.

Philip S. Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

For a large problem size and limited silicon area, the problem can be partitioned into smaller subproblems which can be individually computed by an optimal processor array of the same size. With the same amount of silicon area and external I/O bandwidth, a second array can also be designed with smaller PEs (processing elements), resulting in an array of many more PEs. Each PE will take a longer time to produce a result. However, a large problem may now be handled by the second array without partitioning the problem. Using data broadcasting, the computation time of the second array can equal that of the first array. Architecture and implementation tradeoffs between the two approaches are examined.

Original languageEnglish
Title of host publicationUnknown Host Publication Title
EditorsMalcolm L. Heimer, Donald J. Larnard, Miami Florida Int Univ
Place of PublicationNew York, NY, USA
PublisherIEEE
Pages212-216
Number of pages5
StatePublished - Dec 1 1987

Fingerprint

Parallel processing systems
Broadcasting
Processing
Silicon
Bandwidth

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Liu, P. S. (1987). OPTIMAL AND BROADCASTING PROCESSOR ARRAYS. In M. L. Heimer, D. J. Larnard, & M. Florida Int Univ (Eds.), Unknown Host Publication Title (pp. 212-216). New York, NY, USA: IEEE.

OPTIMAL AND BROADCASTING PROCESSOR ARRAYS. / Liu, Philip S.

Unknown Host Publication Title. ed. / Malcolm L. Heimer; Donald J. Larnard; Miami Florida Int Univ. New York, NY, USA : IEEE, 1987. p. 212-216.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Liu, PS 1987, OPTIMAL AND BROADCASTING PROCESSOR ARRAYS. in ML Heimer, DJ Larnard & M Florida Int Univ (eds), Unknown Host Publication Title. IEEE, New York, NY, USA, pp. 212-216.
Liu PS. OPTIMAL AND BROADCASTING PROCESSOR ARRAYS. In Heimer ML, Larnard DJ, Florida Int Univ M, editors, Unknown Host Publication Title. New York, NY, USA: IEEE. 1987. p. 212-216
Liu, Philip S. / OPTIMAL AND BROADCASTING PROCESSOR ARRAYS. Unknown Host Publication Title. editor / Malcolm L. Heimer ; Donald J. Larnard ; Miami Florida Int Univ. New York, NY, USA : IEEE, 1987. pp. 212-216
@inproceedings{8b763b119581400fa75333bfffa26b7c,
title = "OPTIMAL AND BROADCASTING PROCESSOR ARRAYS.",
abstract = "For a large problem size and limited silicon area, the problem can be partitioned into smaller subproblems which can be individually computed by an optimal processor array of the same size. With the same amount of silicon area and external I/O bandwidth, a second array can also be designed with smaller PEs (processing elements), resulting in an array of many more PEs. Each PE will take a longer time to produce a result. However, a large problem may now be handled by the second array without partitioning the problem. Using data broadcasting, the computation time of the second array can equal that of the first array. Architecture and implementation tradeoffs between the two approaches are examined.",
author = "Liu, {Philip S.}",
year = "1987",
month = "12",
day = "1",
language = "English",
pages = "212--216",
editor = "Heimer, {Malcolm L.} and Larnard, {Donald J.} and {Florida Int Univ}, Miami",
booktitle = "Unknown Host Publication Title",
publisher = "IEEE",

}

TY - GEN

T1 - OPTIMAL AND BROADCASTING PROCESSOR ARRAYS.

AU - Liu, Philip S.

PY - 1987/12/1

Y1 - 1987/12/1

N2 - For a large problem size and limited silicon area, the problem can be partitioned into smaller subproblems which can be individually computed by an optimal processor array of the same size. With the same amount of silicon area and external I/O bandwidth, a second array can also be designed with smaller PEs (processing elements), resulting in an array of many more PEs. Each PE will take a longer time to produce a result. However, a large problem may now be handled by the second array without partitioning the problem. Using data broadcasting, the computation time of the second array can equal that of the first array. Architecture and implementation tradeoffs between the two approaches are examined.

AB - For a large problem size and limited silicon area, the problem can be partitioned into smaller subproblems which can be individually computed by an optimal processor array of the same size. With the same amount of silicon area and external I/O bandwidth, a second array can also be designed with smaller PEs (processing elements), resulting in an array of many more PEs. Each PE will take a longer time to produce a result. However, a large problem may now be handled by the second array without partitioning the problem. Using data broadcasting, the computation time of the second array can equal that of the first array. Architecture and implementation tradeoffs between the two approaches are examined.

UR - http://www.scopus.com/inward/record.url?scp=0023594805&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0023594805&partnerID=8YFLogxK

M3 - Conference contribution

SP - 212

EP - 216

BT - Unknown Host Publication Title

A2 - Heimer, Malcolm L.

A2 - Larnard, Donald J.

A2 - Florida Int Univ, Miami

PB - IEEE

CY - New York, NY, USA

ER -