General ndary mapping procedure for structured licit CFD parallel computation

B. Wang, Z. Hu, G. C. Zha

Research output: Contribution to journalArticle

55 Scopus citations

Abstract

In the present work, a general subdomain boundary mapping procedure has been developed for arbitrary topology multiblock structured grids with grid points matched on subdomain boundaries. The interface of two adjacent blocks is uniquely defined according to each local mesh index system, which is specified independently. A pack/unpack procedure based on the definition of the interface is developed to exchange the data in a one-dimensional array to minimize data communication. A secure send/receive procedure is employed to remove the possibility of blocked communication and achieve optimum parallel computation efficiency. Two terms, "order" and "orientation", are introduced as the logics defining the relationship of adjacent blocks. The procedure is applied to parallelize a three-dimensional Navier-Stokes code, which uses an implicit time marching scheme with line Gauss-Seidel iteration. The partitioning of the implicit matrix is done by discarding the corner matrices, which is easily implemented and is shown to have a small negative effect on the convergence rate. The message passing interface protocol is used for communicating the data. The numerical experiments presented in this paper include two- and three-dimensional flows using Reynolds averaged Navier-Stokes equations and a detached eddy simulation with a fifth-order weighted essentially non-oscillatory scheme. Numerical experiments on a message passing interface based computer cluster show that this general mapping algorithm is robust and has high parallel computing efficiency.

Original languageEnglish (US)
Pages (from-to)425-447
Number of pages23
JournalJournal of Aerospace Computing, Information and Communication
Volume5
Issue number11
DOIs
StatePublished - Nov 1 2008

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ASJC Scopus subject areas

  • Aerospace Engineering
  • Computer Science Applications
  • Electrical and Electronic Engineering

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